- NVIDIA (Santa Clara, CA)
- …team and see how you can make a lasting impact on the world. We seek an RTL Analysis Methodology Engineer to join our Logic Design Implementation team. The ... verification methodologies. + Contribute to architecting and developing brand-new RTL analysis flows. + Serve as an...documents and train internal users. + Use data collection, analysis , and reporting tools to provide methodology … more
- NVIDIA (Santa Clara, CA)
- …now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer! NVIDIA is seeking a DFD Architect to implement hardware and software ... tools. + Great understanding of ASIC design flow including RTL design, verification, logic synthesis, timing analysis ...including RTL design, verification, logic synthesis, timing analysis and bringup. + Strong interpersonal skills and an… more
- Renesas (Austin, TX)
- …in Verilog/SystemVerilog RTL for digital CMOS circuit design. + **ASIC Methodology :** Strong understanding of ASIC design methodology , linting, CDC & RDC ... Senior Principal Electrical Engineer Job Description The Performance...Develop detailed specifications for execution by medium-to-large teams. + ** RTL Design:** Lead and oversee digital RTL … more
- Micron Technology, Inc. (Atlanta, GA)
- …flow and DFT verification. + Good understanding of ASIC design flow including RTL design, verification, logic synthesis, and timing analysis . + Familiarity with ... the world uses information to enrich life. Micron is searching for its next Principal/ Senior Design Verification Engineer! In this role, you will work with a highly… more
- NVIDIA (Santa Clara, CA)
- …Chip Leads, and Customers on SOC IP design, development, timing closure, power analysis , methodology alignment, and program execution to ensure pre-silicon and ... NVIDIA is hiring a Senior Design Engineer to design, analyze, and evolve...of external and internal IPs. + Contribute to cross-team RTL methodologies to achieve efficient design reuse. + Evaluate… more
- Northrop Grumman (Linthicum, MD)
- …UVM + Experience developing testplans, participating in reviews, test development and RTL debug ** Senior Principal Engineer Basic Qualifications:** + Bachelor's ... for you to join our team as a Principal Digital Verification Engineer/ Senior Principal Digital Verification Engineer based out of Linthicum, MD or Morrisville,… more
- Microsoft Corporation (Redmond, WA)
- …Complementary Metal-Oxide Semiconductor (CryoCMOS) team, is looking for a ** Senior Quantum Digital Application-Specific Integrated Circuit (ASIC) Design Engineer** ... work in a small, collaborative environment. We are looking for ** Senior Quantum Digital Application-Specific Integrated Circuit (ASIC) Design Engineer** who is… more
- BAE Systems (San Jose, CA)
- …start up with the stability of a large company. We are looking for a senior level chip designer who has strong proficiency in both + ASIC design- performing ... architecture design, RTL coding/simulation, timing closure at layout phase + Verification-...+ Verification- executing testbench creation, functional coverage, test failures analysis , regression Detail requirements + Front End Design and… more
- NVIDIA (Santa Clara, CA)
- …reduce power consumption of NVIDIA GPUs. As a member of the Power Modeling, Methodology and Analysis Team, you will collaborate with Architects, ASIC Design ... for building energy models that integrate into architectural simulators, RTL simulation, emulation and silicon platforms. Key responsibilities include developing… more
- SpaceX (Irvine, CA)
- …for test modes + Timing closure ownership throughout the entire project cycle ( RTL , synthesis, and physical implementation) + Analysis of clock domain crossing ... teams to drive integration, timing, logical equivalence checking and analysis of various IPs into RTL +...Functional ECOs for complex blocks + Deploy and enhance methodology and flows related to timing constraint generation and… more