- NVIDIA (Santa Clara, CA)
- …imagination and intelligence. Make the choice to join us today. DFX Methodology Group at NVIDIA works on groundbreaking innovations involving crafting creative ... 3+, or PhD with 2+ years of experience in DFT , system architecture, or RTL design. + Understanding of...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Cisco (San Jose, CA)
- …flows, and post-silicon test bring up procedures. Preferred qualifications: * DFT CAD development - Test Architecture, Methodology and Infrastructure ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow… more
- NVIDIA (Santa Clara, CA)
- …tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior DFT Engineer to join our dynamic and growing team! If you ... + You will be responsible for all aspects of testing including methodology , logic insertion, verification, test pattern generation, test program bring-up, and… more
- NVIDIA (Santa Clara, CA)
- …to join us today. The NVIDIA Clocks group is looking for a top ASIC Methodology engineer with proven experience in high-speed logic design and verification. In ... significantly. Modern clocking design needs to balance high frequency clocks with power, DFT , noise, circuit and physical design constraints. What you'll be doing: +… more
- Amazon (Cupertino, CA)
- …integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and architectures, ... flows for ML Accelerator chips in advanced nodes Drive improvement in RTL2GDS flows/ methodology for PPA and TAT improvements Create Dashboard and Central reports for… more
- Micron Technology, Inc. (Atlanta, GA)
- …how the world uses information to enrich life. Micron is searching for its next Principal/ Senior Design Verification Engineer ! In this role, you will work with a ... and process improvements; including the effort to port-over the probe and burn DFT patterns into the verification flow. + Provide verification support to the DRAM… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... experience to improve timing convergence flows working with the methodology teams. What we need to see: + BS...GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing… more
- Renesas (San Jose, CA)
- Senior Staff Engineer , Electrical Design Job Description + Propose, Architect, and Design RTL in Verilog for use in a Mixed Signal Integrated Circuit + ... Experience in digital design implementation including logical synthesis and DFT insertion with high coverage + Experience in static...+ Fluent in Verilog RTL coding and ASIC design methodology is a must + Competence in developing design… more
- Belcan (Austin, TX)
- Senior Electronics Test Engineer I Job Number: 353143 Category: Electrical / Electronics Description: Job Title: Senior Electronics Test Engineer I ... and test systems, including equipment selection, test fixtures, data logging methodology , and interfaces. * Designing and executing tests at the prototype,… more
- The Boeing Company (Huntington Beach, CA)
- …of these projects. We are seeking a **Digital Integrated Circuit Design Engineer (Mid-Level, Senior or Lead)** with experience developing complex, ... of 3rd party IP (digital, mixed-signal), synthesis, place & route, design-for-test ( DFT ) insertion + Static timing analysis / timing closure + Power analysis,… more