• Sr. RTL Design Engineer, Hardware…

    Amazon (Boise, ID)
    …tablets, Fire TV and Amazon Echo. What will you help us create? The Role: As a Senior RTL Design Engineer, you will be part of an advanced architecture team ... with team members across multiple disciplines - Develop detailed design specifications and documentation - Perform RTL ...panel and display driver IC technologies - Experience with ARM and various DSP ISA - Experience debugging system-level… more
    Amazon (09/11/24)
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  • Senior ARM RTL Design

    Cadence Design Systems, Inc. (Austin, TX)
    …in IP creation and/or SoC and IP (CPU, Memory, Interface) integration Expert in RTL design (Verilog), simulators debuggers Hands on Experience in Synthesis, SDC ... Solutions (North America) team is looking for an experienced RTL designer to contribute to architecture and design...ARM and/or RISCV CPU and System IP + Design IP selection/configuration/integration for Memory and/or Interface IP (PCIe,… more
    Cadence Design Systems, Inc. (09/17/24)
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  • Senior ASIC Design Engineer

    Tarana Wireless (Milpitas, CA)
    …to multipoint wireless products. + Architecture and micro-architecture of digital subsystems + RTL design of digital circuits using Verilog + Frontend design ... Interface IPs + Chip level integration and verification + RTL design and integration of large functional...as Python + Excellent communication skills Preferred Skills: + Design or integration of ARM , MIPS, Risc-V,… more
    Tarana Wireless (11/02/24)
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  • Senior Logic Design Engineer

    Microsoft Corporation (Austin, TX)
    …Azure cloud servers, clients, and augmented reality. We are looking for a ** Senior Logic Design Engineer** to work in the dynamic Microsoft Artificial ... functions and features. + Be responsible for + Logic design /Register Transfer Level ( RTL ) entry + ...control regulations, potentially under the US International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual… more
    Microsoft Corporation (11/08/24)
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  • Sr. Staff Design Engineer (Low Power)

    Qualcomm (Santa Clara, CA)
    …power correlation. The candidate will also be responsible for the full chip debug design using ARM IPs. Experience in SoC low power micro-architecture, low power ... estimates; Power Intent; Power Implementation; WiFi or WLAN; Power Optimization; ARM IP/Coresight based debug design **Principal Duties and Responsibilities:**… more
    Qualcomm (10/10/24)
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  • Senior Memory System Architect

    NVIDIA (Santa Clara, CA)
    As a Senior Memory System Architect at NVIDIA, you will have the opportunity to drive the development of architecture and micro-architecture to improve the ... micro-architectural optimizations. + Debugging performance and functional issues using performance models, RTL simulation, and silicon. What we need to see: + A… more
    NVIDIA (10/24/24)
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