• Design Verification ( DV

    Cisco (San Jose, CA)
    …developed in the industry. What You'll Do You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of the ... Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as part… more
    Cisco (10/30/24)
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  • UVM Design Verification

    Textron (Wilmington, MA)
    …the products we make\! **_About This Role_** Textron Systems is looking for a FPGA/ASIC Design Verification \( DV \) Engineer whose primary job function ... **UVM Design Verification Engineer III** **Description** **_Who We Are_** Textron Systems is part of Textron, a $14 billion, multi\-industry company… more
    Textron (11/05/24)
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  • Senior E/E & Semiconductor Engineer - Lead…

    Capgemini (San Francisco, CA)
    **Job role:** **Lead DV IP Verification Engineer ** **Job Location : San Francisco CA / Sunnyvale CA** **Job description:** Architect and Create ... end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Lead DV IP Verification more
    Capgemini (09/04/24)
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  • CAD - DV Emulation Engineer , Sr.…

    Qualcomm (Santa Clara, CA)
    DV & Emulation methodology and support, you will work with RTL, architecture, design , DV , software and silicon verification users. Interfaces with various ... from conceptualization to productization (ie, architecture definition, feasibility, pre-silicon design and verification , and post-silicon validation) that meet… more
    Qualcomm (08/24/24)
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  • CPU DV Infrastructure Engineer

    Qualcomm (Austin, TX)
    …a DV Infrastructure Engineer focusing on the methodology and support of RTL design verification , you will work with design , verification , and CAD ... and external vendors. Collaborate with both CAD and front-end design teams in productizing solutions to enable faster and...and architect flow solutions tied to internal and vendor-based RTL/ Verification CAD tools. + Interact with DV more
    Qualcomm (10/03/24)
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  • ASIC DV Technical Lead Engineer

    Cisco (Maynard, MA)
    …back to a company culture that empowers an inclusive future for all. The ASIC Design Verification Technical Lead Engineer will be working on next generation ... technical leaders in the engineering community. This Technical Lead Engineer must be able to operate independently with minimal... design engineers * Participate in review of design verification coding and coverage metrics *… more
    Cisco (11/07/24)
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  • Sr DV CAD Engineer

    Qualcomm (Santa Clara, CA)
    …Summary:** As a CAD Engineer focusing on the methodology and support of RTL design verification , you will work with architecture, design , software and ... the design methodology and high level requirements in support of design verification . + Collaborate with chip leads to determine other areas to support… more
    Qualcomm (10/10/24)
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  • Design Verification Engineer

    ManpowerGroup (Santa Clara, CA)
    Our client in the technology industry is seeking a Design Verification Engineer - Specialized to join their team. As a Design Verification ... and skills of the team around you. **Job Title:** Design Verification Engineer - Specialized...for me?** + Opportunity to work with a world-class design / DV teams. + Stretch yourself as you… more
    ManpowerGroup (11/13/24)
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  • Sr.Staff SoC Lead design

    Qualcomm (Santa Clara, CA)
    …**Job Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Design Verification Lead, you will lead a team of ASIC design ... a team defining the processes, methods and tools for design verification of large complex IP blocks...+ 8+ years or more of practical semiconductor ASIC DV experience including owning end-to-end verification of… more
    Qualcomm (10/29/24)
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  • ASIC Design Verification

    Cisco (San Jose, CA)
    …You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon One ... Specific responsibilities include: * Architect block, cluster and top-level DV environment infrastructure. * Develop DV infrastructure...other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC… more
    Cisco (10/01/24)
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