• ASIC Engineer , DFT

    Meta (Sunnyvale, CA)
    DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and… more
    Meta (10/18/24)
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  • DFT Engineer

    Qualcomm (San Diego, CA)
    …transformation to help create a smarter, connected future for all. The Digital ASIC Design Team is currently seeking candidates who will be responsible for the ... implementation and verification of advanced DFT /DFD (Design for Test/Design for Debug) techniques for low...Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.… more
    Qualcomm (08/30/24)
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  • Design-For-Test ( DFT ) Engineer

    Insight Global (St. Paul, MN)
    Job Description As a Design-For-Test ( DFT ) Engineer , you will be responsible for designing and implementing advanced DFT architectures and methodologies to ... field. 2. Experience: - 5+ years of relevant experience as a Design-For-Test ( DFT ) Engineer , preferably in the semiconductor or consumer electronics industry. 3.… more
    Insight Global (11/13/24)
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  • HBM/DDR/SerDes DFT Verification Lead…

    Broadcom (San Jose, CA)
    …San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role, you ... Account, please Sign-In before you apply.** **Job Description:** Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead… more
    Broadcom (11/06/24)
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  • Senior DFT Engineer

    Cisco (San Jose, CA)
    …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow… more
    Cisco (10/17/24)
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  • DFT Engineer (Austin, TX)

    Qualcomm (Austin, TX)
    …and data processing transformation to help create a smarter, connected future for all. The DFT Engineer will be part of Qualcomm Austin DSP team which is ... responsible for implementation of DFT architectures and strategies on DSP cores. This person...Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.… more
    Qualcomm (09/17/24)
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  • CPU DFT Engineer

    Qualcomm (San Diego, CA)
    …digital transformation to help create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip designers, implementation ... in digital ASIC design; experience using Verilog or VHDL + Experience with ASIC test, DFT , and debug + 5+ years of practical experience with test or DFT more
    Qualcomm (11/01/24)
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  • DFT Design Automation Engineer

    Broadcom (Fort Collins, CO)
    …please Sign-In before you apply.** **Job Description:** We are a world class semiconductor ASIC provider. We provide first time correct on schedule ASIC designs ... on proven flows and methodology. As a Design Automation Engineer you will join a highly skilled team of...that own and provide the flows that enable our ASIC design teams. This position would focus on developing,… more
    Broadcom (11/01/24)
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  • ASIC Design for Test Engineer

    Cisco (San Jose, CA)
    …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow… more
    Cisco (11/01/24)
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  • Sr. SOC/ ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER ...Work closely with chip architecture, design verification, physical design, DFT , and power teams to achieve tapeout success on… more
    SpaceX (08/24/24)
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